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Meet the world's first 1,000-processor microchip

A design team at the University of California, Davis says their KiloCore microchip is 100 times more efficient than a modern laptop processor.

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A visitor uses a new laptop at the Computex trade show in Taipei, Taiwan, in June 2015. The new KiloCore microchip, believed to be the first 1,000-processor microchip, is said to be 100 times more efficient than a modern laptop processor.

Wally Santana/AP/File

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Engineers have built what is thought to be the world's first 1,000-processor microchip. 

The "KiloCore" chip, which contains 1,000 independent programmable processors, was designed by a team in the Department of Electrical and Computer Engineering at the University of California, Davis (UC Davis), and presented at the 2016 Symposium on VLSI Technology and Circuits last Thursday. 

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It has a maximum computation rate of 1.78 trillion instructions per second and contains 621 million transistors, according to a UC Davis press release. 

"To the best of our knowledge, it is the world's first 1,000-processor chip and it is the highest clock-rate processor ever designed in a university," said the project's leader, Bevan Baas, a professor of electrical and computer engineering. 

The KiloCore, which was fabricated by IBM using their 32 nm CMOS technology, is the first multiple-processor chip to exceed about 300 processors, according to an analysis by Baas and his team. The world's fastest supercomputer, built recently in China, uses 41,000 chips that each contain 260 processor cores, reports The Christian Science Monitor's Max Lewontin. 

The KiloCore is also the most energy-efficient "many-core" processor ever reported: the 1,000 processors can execute 115 billion instructions per second while dissipating only 0.7 Watts, low enough to be powered by a single AA battery, its creators say. That's 100 times more efficient than a modern laptop processor.

The energy-efficiency of the KiloCore is due to the fact that each processor is independently clocked and can run its own small program independently of the others. 

"The idea is to break an application up into many small pieces, each of which can run in parallel on different processors, enabling high throughput with lower energy use," according to the UC Davis press release. 

When individual processors aren't needed, they can shut themselves down to further save energy, said graduate student Brent Bohnenstiehl, who developed the principal architecture. 

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The chip may be used for video processing, wireless coding and decoding, and encryption, as well as in other processes that involve huge amounts of parallel data, according to UC Davis. 


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